Experience
Design Experience Summary
Design Experience Details
Design and Development of an Electronic Print Engine
Development of an electronic print engine which consisted of numerous high voltage power supplies, low voltage power supplies, motors and motor controllers, various actuation devices and sensors, vacuum blower, water chiller, power distribution, SCL 500 programmable logic controller, analog and digital circuit boards, and a PC computer. Heavy involvement with outside vendors and consultants allowed for rapid development.
Development of Computer Simulation Routines for a Belt Steering Control System
Developed computer simulation routines for a belt steering control system. The belt steering process was modeled and the process variables were defined. The system characteristic equation was then determined in terms of the critical variables. A generic time domain system solution was then calculated and implemented in computer simulation using Quickbasic. The process variables were then characterized on a test fixture and run through the simulator to determine the dynamic system response under various control conditions. The simulation replicated the actual system behavior reasonably accurately, thereby revealing the level of sensitivity to the critical system variables.
Development of Computer Simulation Routines for an Electrostatic Voltage Control System
Developed computer simulation routines for an electrostatic voltage control system within an electronic print engine. The electrostatic voltage control process was modeled and the process variables were defined. Due to the complexity of the control loop, a recursive computation method for the simulation was developed and implemented. The critical process variables were input by the user and the time-domain response was computed and plotted. The simulation replicated the actual system behavior reasonably accurately, thereby revealing the level of sensitivity to the critical system variables.
Generation of Numerous Functional Specifications at Both the Board and System Levels
Generation of functional specifications for circuit boards, digital systems, software programs, machine control systems, PLC programs, supervisory control systems, and graphical user interfaces. Also experienced with generation of acceptance test procedures and user manuals.
White-Paper Design of High Speed Raster Image Processor
Design of high speed scalable raster image processor for electronic printing application. A multiprocessor architecture was developed to allow for multiple cellular image processors to function as one larger integrated imaging system. New methods were developed for multiple image processors, pixel-based addressing, memory concatenation, and orthogonal image rotations.
Design of Image Compression/Decompression Circuit Board
Completed design of an image compression/decompression board. The board compressed or decompressed monochrome digital images using a video compression/expansion processor (VCEP) chip (AMD95C71). Images were received from the VME bus and transmitted to parallel transfer disk drives, or back to the VME bus for loop-back testing. The board utilized Altera EP1810 PLDs for most logic functions. A VME bus interrupter module (MC68153) was used to generate all VME bus interrupts, and implemented VME Bus Request/Grant daisy chains. The board was fully VME compliant with a 9U by 400 mm form factor.
Design of Encoder Filter Signal Processing Circuit Board
Designed a signal processing circuit board to perform digital filtering of an encoder signal to eliminate undesired frequency modulations. The TI TMS320C25 DSP processor was used for digital signal processing functions. The software algorithms for the digital filtering operations were developed. A high speed digital frequency synthesizer was created to reconstruct the filtered encoder signal. Altera EP610 and EPM5032 PLDs were used for all logic functions. Self calibration functions and diagnostic read-back paths were incorporated into the design. The board was fully VME compliant with a 6U by 160 mm form factor.
Design of Image Synchronization and Registration Circuit Board
Design of an image registration and synchronization circuit board. This board synchronized digital image addressing lines with an external sync pulse for proper placement of the image onto the print surface. A phase-locked-loop was developed to allow for proper placement of the image data, even when several sync pulses were missing. Offset registers allowed for circumferential image registration adjustment. Altera EP610 PLDs were used for most logic functions. The board was fully VME compliant with a 6U by 160 mm form factor.
Design of Image Memory Address Controller
Design of image memory address controller board. A pipelined addressing architecture allowed for minimum addressing cycle time. A burst mode access function allowed for efficient memory clearing. A block access function allowied for selectively clearing portions of image memory array. Interrupt generation logic for a fully VME compliant interrupt structure was developed. Altera EP1810 PLDs were used for most logic functions. The board was fully VME compliant in a 9U by 400 mm form factor.
Design of Raster Image Processor Interface Circuit Board
Design of a raster image processor (RIP) interface board to allow image data input from external RIPs. Provided for placement of RIP image data into image memory arrays. Interface logic allowed for image data manipulation such as inversion, bit reversal, RIP multiplexing, and force white or black. Altera EP900 PLDs used for some logic functions. Custom bus interface on 6U VME by 280 mm form factor.
Design of Image Data Translation Circuit Board
Design of a image data translation circuit board for delivery of image data to an LED array. Provided timing and control logic for compensation of LED array illumination intensity nonuniformity. Altera EP610 and EP900 PLDs were used for most logic functions. A custom bus interface was developed on a 9U by 280 mm VME form factor.
Design of Digital Image Convolution Filter
Design of a 2 dimensional third order convolution image filter utilizing a Motorola DSP56000 processor. Programming of the DSP processor was in native DSP56000 assembly language. Compilation and simulation was performed on the Motorola development platform for the DSP56000 processor.
Development of FFT Software Routines for Signal Processing
Development of FFT software routines for signal processing of frequency modulated signals in machine vibration analysis application. FFT routines were written in compiled Quickbasic. Routines were also written to store and retrieve data in files, and for printing of the plots.
Design of VME Backplane
Design of 12 layer VME 9U by 21 slot backplane. Fully VME compliant bus interface for 13 slots, and custom bus interface for 8 slots. VME compliant signal impedance and terminations. The entire card cage contained 4 off-the-shelf Parallel Transfer Disk (PTD) controllers 9U/400mm, 1 off-the-shelf VME repeater board 6U/160mm with adapter to 9U/400mm, 2 image compression/decompression boards 9U/400mm, 2 image memory address controller boards 9U/400mm, 6 image memory boards 6U/280mm with adapters to 9U/400mm, and 2 image data translation boards 9U/400mm.
Extensive VME Bus Experience in Multiprocessor Environment
Multiprocessing on the VME bus using multiple CPU boards. Experience with Motorola MVME134 and MVME147 boards, VME bus interrupter modules (MC68153), VME bus interrupt handlers, VME interrupt cycles and IACK daisy chains, and use of multiple bus levels and bus request/grant daisy chains.
Design of LED Array Control circuit board
Design of analog circuit board for control of LED array brightness level. Discrete and analog signal isolation from electrical system. Instrument panel for status indications.
Design of a LED Array Scanning and Compensation System
Design of an LED array scanning system and the algorithms to compensate for nonuniform luminous intensities from the individual LEDs in the array. Programs were also developed to plot the uncompensated and compensated luminous intensity profiles of the LED array. Interfaces were developed for control of an HPIB micro-positioning translation stage, DASCON data acquisition board, optical power meter, LED data generation system, and a Data I/O PROM programmer.
Design of Data Acquisition Board for Frequency Modulated Signals
Completed the design of a digital data acquisition board. This board provided for the measurement of the time between pulses of frequency modulated pulse trains for eight input channels. Channel arbitration logic was developed and on-board FIFOs were incorporated for storing the acquired data. The board had a fully compliant IBM-PC bus interface and form factor. Software was developed to compute the FFT of the acquired data, and to display the FFT on a CRT and to print out the FFT plots. This system was a development tool used to analyze frequency modulated pulse trains in the frequency domain. Input signals from various sources can be analyzed, such as torsional gear vibration in press drive trains and encoder signal modulations.
Design of PLC-Based Electronic Press Control System and Drive
Developed a PLC-based control system for a duplex xerographic printing press. The PLC controller was a TI565 and consisted of approximately 100 discrete I/O points and 50 analog I/O signals. Developed all the software for the system controls, consisting primarily of motor controllers, liquid toner ink control system, main press drive control, dryer control, web transport control, and a user interface terminal. Closed loop process control of print engine parameters allowed for improved print quality and consistency. Use of high level special functions within a PLC programming environment, such as analog alarms, PID loops, and Special Function programs. The main drive system consisted of a General Electric DC-300 four quadrant, regenerative motor controller. The power distribution system consisted of transformers, circuit breakers, motor starters, contactors, and fuses. The user interface terminal consisted of Panelmate I and provided icons, alarms, and automatic and diagnostic modes of operation.
Design of 600HP Press Drive and Control System
Design of press drive and control system for a Harris N900 newspaper press. Four horsepower configurations up to dual load-sharing 300 HP motors totaling 600 HP. Use of Reliance Maxpack motor controllers and Reliance Automate PLC. Power distribution system with 1200 A main disconnect consisting of transformers, circuit breakers, motor starters, contactors, and fuses.
Design of Bad Product Identification System
Design of a Bad Product Identification system which identified and marked defective printed material when produced on a Harris M800 newspaper press. The input conditions for bad product were web splice, blanket wash, and hickey removal from a printing plate. Upon occurrence of a bad product condition, the bad product was tracked through the press until it reached a marking device, at which time the marking device marked the bad product. The defective printed material, as marked, was later removed by personnel at the press delivery.
Design of Microwave Antenna Test Bed
Designed and integrated a test bed for microwave antennas. Involved development of a high-speed ECL bit error rate counter. Integrated RF interface panels and interconnect hardware, various card cages and control panels, and power distribution hardware.
Mil-Spec Test Fixture Design and Support
Participation in the development of mil-spec electronic test hardware. Participation in microwave antenna testing under digital control. Maintenance and support of fiber optic interface electronics. Generation of military specifications for circuit board functional definitions and testing specifications.
Design of Envelope Feeder
Design of an envelope feeder for a sheet-fed lithographic printing press. Extensive mechanical design of machine linkage assemblies, gear assemblies, cams, and chassis assembly. Amicroprocessor-based electrical system was developed to allow for simultaneously feeding two envelopes by means of precise automatic printing impression control. Acquired US Patent number 4,524,691.
Project Management Experience Synopsis
Project Management Experience Summary of Details
Project Management Experience Details
Management of Electronic Printing Systems Design and Development
Printing systems consisted of electrostatic print engines, raster image processors, embedded controllers, and PC computers. Print engines consisted of electrostatic printing processes utilizing print heads, developers, coronas, cleaning stations, high voltage power supplies, and embedded machine controllers. Raster image processors consisted of an AMD bit slice raster engine and a Z-80 supervisory processor. Job server computer and pre-press workstation consisted of a Pentium PC running Win95 with the applications written in C++ compliant with MFCs (Microsoft Foundation Classes).
Management of Newspaper Equipment Control Systems Design and Development
This organization was responsible for the design and development of newspaper mailroom supervisory control systems and machine control systems.
Manager of Electronic Book Image Processing System Design and Development
Responsible for the development of a book image processing system for a high-speed book printing application. One group under my direct supervision which consisted of 14 employees.
Manager of Digital Image Processing System Deisgn and Development
Responsible for the development of a digital imaging system for variable information printing application. One group under my direct supervision which consisted of 6 employees.
The information below describes the design tools, software, and test equipment and instrumentation with which we have direct experience.
Design Tools